1. Field of the Invention
The present invention relates in general to a technology for plasma display panel, and more particularly to an energy recovery circuit for a plasma display panel.
2. Description of the Related Art
A PDP device, which displays images by accumulating charges by electrode discharge, is an attention-getting flat display since it can have a large screen size display a full-color image.
FIG. 1 is a cross-sectional diagram of a conventional PDP cell, in which the PDP is triple-electrode type. As shown in the drawing, the PDP is basically constituted by two glass substrates 1 and 7. Inert gas such as Ne, Xe is filled in the cavity formed between the glass substrates 1 and 7. Two electrodes including a sustain electrode X and a sustain electrode Yi are disposed parallel to each other on the glass substrate 1. A dielectric layer 3 and a protective film 5 are formed covering the sustain electrode X and the sustain electrode Yi. Address electrodes Ai, which are perpendicular to the sustain electrode X and the sustain electrode Yi, are disposed on the glass substrate 7. Partition wall 8 is used to isolate each PDP cell. Fluorescent material is placed between the partition walls to luminesce during the discharge process.
FIG. 2 is a block diagram of a conventional PDP device. As shown in the drawing, the PDP 100 is driven by the sustain electrodes Y1xcx9cYn and sustain electrode X parallel to each other and the address electrodes A1xcx9cAm across thereon. The reference numeral 10 indicates the display unit of the PDP 100. Partition wall 8 is used to isolate each display unit 10.
Besides the PDP 100, the PDP device includes the control circuit 110, the Y scan driver 112, the X common driver 114 and the address driver 116. The control circuit 110 can generate the timing information necessary for every driver according to the external clock signal CLOCK, the video data signal DATA, the vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC. The clock signal CLOCK represents the data-transmitting clock. The video data signal DATA represents the display data. The vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC are used to define the timing of a single frame and a single scanning line. The control circuit 110 generates every clock and data to be displayed, which are sent to the corresponding drivers to generate the signals needed to drive the electrodes.
FIG. 3 is diagram of driving the PDP to display a frame in the prior art. A frame is normally divided into several sub-fields. For instance, the frame of FIG. 3 is divided into 8 sub-fields SF1xcx9cSF8. Each sub-field is used to display the corresponding gray scales on all scanning lines. For example, 8 sub-fields can be used when 256 levels of gray scales corresponding to 8 bits are to be displayed. Each sub-field is constituted by three operating periods, i.e., the reset periods R1xcx9cR8, the address periods A1xcx9cA8 and the sustain periods S1xcx9cS8. The residual charge left from the last field display is cleaned in the reset period. The wall charge is accumulated in the display cell through address discharge in the address period. The accumulated wall charge is sustained to maintain the display status in the sustain period. All display units on the PDP are simultaneously processed in the reset period R1xcx9cR8 and the sustain period S1xcx9cS8. However, address operation is sequentially performed for the display units on the sustain electrodes Y1xcx9cYn in the address periods A1xcx9cA8.
FIG. 4 is the timing diagram of the control signals of the sustain electrodes X and Yi on a single sub-field of FIG. 3 such as SF1. After finishing the reset operation of all scanning lines, the address period starts. In the address period, i.e., A1, the X common driver 114 controls the sustain electrode X to output the voltage Vs. The scanning lines corresponding to the electrodes Y1, Y2, Y3, . . . , Yn sequentially output the address pulses AP including display data to the address electrodes A1, A2, . . . , Am through the address driver 116. Therefore, a transient discharge occurs on the display unit 10 corresponding to the data to be displayed, and the wall charge is accumulated in the display unit 10. After processing all of the scanning lines, the xe2x80x9cdata to be displayedxe2x80x9d can be stored in the corresponding display unit 10 in the form of accumulated wall charge.
After finishing the address period, the sustain period (i.e., S1) starts. In the sustain period, the Y scan driver 112 and the X common driver 114 alternately send the sustain pulses to all of the sustain electrodes Yi and the common sustain electrode X. As shown in FIG. 4, a sustain pulse Xsus having a voltage level Vs is sent to the sustain electrode X. This action will be repeated during the sustain period of the sub-field. Moreover, this action involves all of the display units 10, but only the display units 10 that have accumulated wall charges through the address discharge during the address period keep luminescing during the sustain period.
Accordingly, the X common driver 114 periodically generates a sustain pulse Xsus during the sustain period. Normally, the sustain pulse Xsus is a signal of high frequency and high voltage, thus causing a considerable power consumption. There are many energy-recovery structures designed for this driving circuit currently. FIG. 5 is a circuit diagram of a prior-art energy-recovery structure for PDP driving circuit. As shown in the drawing, Cp indicates the capacitor-like load corresponding to the display units 10 of the PDP 100. The capacitor Cp has one end connected to the Y scan driver 112. The X common driver 114 includes the MOS transistors T1, T2, T3 and T4, the inductance element 61 and the capacitor C3. The capacitor C3 is an element storing and releasing energy. The transistors T3 and T4 are alternatively opened to raise up or pull down the voltage of the sustain electrode X. The operation is briefly described below.
When the voltage of the sustain electrode X changes from 0 volts to Vs, i.e., the rising edge of the sustain pulse Xsus, the voltage of the capacitor C3 maintains at Vs/2, and the voltage of the coil is 0 volts. At this time, the transistor T3 is turned on, and the voltage Vs/2 of the capacitor is applied to one end of the coil 61. Thus a current occurs on the coil 61 and the voltage of the sustain electrode X on the other end of the coil rises up. Since a counter electromotive force exists on the coil 61, the voltage of the sustain electrode X, i.e., the other end of the coil, can theoretically be raised to Vs. However, the voltage cannot rise up to Vs in practice due to loss. The voltage of the sustain electrode X is raised to Vs by turning the transistor T1 on if the voltage of the sustain electrode X is a little lower than Vs. That the voltage of the sustain electrode X suddenly rises to Vs will cause the problem of electromagnetic interference.
On the other hand, when the voltage of the sustain electrode X changes from Vs to 0 volts, i.e., the falling edge of the sustain pulse Xsus, the voltage of the coil is Vs. At this time, the transistor T4 is turned on, and the voltage Vs/2 of the capacitor C3 is applied to one end of the coil 61. Thus a reverse current occurs on the coil 61, and the voltage of the sustain electrode X on the other end of the coil 61 falls down to 0 volts. However, the voltage of the sustain electrode X does not fall to 0 volts in practice due to loss. The voltage of the sustain electrode X can fall down to 0 volts by turning the transistor T2 on if the voltage of the sustain electrode X is a little higher than 0 volts. That the voltage of the sustain electrode X suddenly falls to 0 volts will also cause the problem of electromagnetic interference.
In order to improve on the drawbacks for the above energy-recovery structure, U.S. Pat. Nos. 5,438,290 and 5,828,353 disclose using a capacitor as a device storing and releasing energy to reduce the power consumption for repeatedly driving the sustain electrode X.
Accordingly, an object of the present invention is to provide an energy-recovery driving circuit which is suitable for using in the driver of a PDP. The energy-recovery circuit can avoid the problem of electromagnetic interference since the transistors of the circuit switch are at zero voltage.
According to the above object, the energy-recovery driving circuit of this invention alternatively applies a driving potential Vs and a reference potential V0 to the sustain electrode X on a PDP. The sustain electrode connects to the capacitor-like load corresponding to the display units. The energy-recovery driving circuit includes a first voltage source for providing the driving potential; a second voltage source for providing a first potential which is lower than the driving potential and storing electrical energy; a first channel, including a first inductance element connected between the first voltage source and the electrode, for providing electrical energy to the electrode while the potential of the electrode changes from the reference potential to the driving potential; a second channel, including a second inductance element connected between the second voltage source and the electrode, for providing electrical energy by the electrode and storing the electrical energy in the second voltage source while the potential of the electrode changes from the driving potential to the reference potential; a first switch, connected between the first voltage source and the electrode, for connecting the first voltage source to the electrode while the potential of the electrode changes from the reference potential to the driving potential; and a second switch, connected between the second voltage source and the electrode, for connecting the electrode to the reference potential while the potential of the electrode changes from the driving potential to the reference potential. The first channel further includes a third switch for controlling the turn-on of the first channel. The second channel further includes a fourth switch for controlling the turn-on of the second channel.
Furthermore, the first switch can be replaced by a unidirectional conductive element connected between the first voltage source and the electrode to control the charge direction. The second switch can be replaced by a second unidirectional conductive element connected between the second voltage source and the electrode to control the discharge direction.
The first channel and the second channel may share a common channel. In other words, the first inductance element and the second inductance element can be replaced by a single inductance element. The common channel further includes a current direction control device for setting the conducting direction of the first channel and the conducting direction of the second channel.